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Semester Projects
Spring 2025
Embark on an exciting journey with the EPFL Spacecraft team! Our semester projects offer you the unique chance to apply your academic knowledge to real-world challenges in spacecraft design and exploration. Step into the frontier of space technology, and shape the future of space travel with us!
System engineering
FlastSat testbench - Already taken
Semester project
Section : MT - EL
Description:
For this semester project, the primary objective is developing an avionics test bench to simulate the electrical and information interfaces between the satellite’s subsystems. This FlatSat will be used for functional system testing during the Assembly Integration and Testing (AIT) phase. The project will include defining the requirements and designing the test bench’s hardware as Ground Support Equipment (GSE). Additionally, a testing plan should be developed for these specifications, to ensure requirement compliance. If time permits, hardware development and assembly of the testbench could start, with a focus on the currently available subsystems: the On-Board Computer (OBC), the Ultra High Frequency (UHF) communication module and the Attitude Determination and Control System (ADCS).
Tasks:
- Study the satellite interfaces and finalize the FlatSat requirements.
- Research and document state-of-the-art FlatSat solutions.
- Design the electrical interfaces and data communication links between subsystems.
- Define a testing protocol for the FlatSat, to verify that it meets the requirements.
Background and skills:
- Foundation in electronic circuit design and embedded systems engineering.
- Knowledge of communication protocols.
- Systems Engineering knowledge (Requirements, AIT, Validation and Verification, …)
For this semester project, the primary objective is developing an avionics test bench to simulate the electrical and information interfaces between the satellite’s subsystems. This FlatSat will be used for functional system testing during the Assembly Integration and Testing (AIT) phase. The project will include defining the requirements and designing the test bench’s hardware as Ground Support Equipment (GSE). Additionally, a testing plan should be developed for these specifications, to ensure requirement compliance. If time permits, hardware development and assembly of the testbench could start, with a focus on the currently available subsystems: the On-Board Computer (OBC), the Ultra High Frequency (UHF) communication module and the Attitude Determination and Control System (ADCS).
Tasks:
- Study the satellite interfaces and finalize the FlatSat requirements.
- Research and document state-of-the-art FlatSat solutions.
- Design the electrical interfaces and data communication links between subsystems.
- Define a testing protocol for the FlatSat, to verify that it meets the requirements.
Background and skills:
- Foundation in electronic circuit design and embedded systems engineering.
- Knowledge of communication protocols.
- Systems Engineering knowledge (Requirements, AIT, Validation and Verification, …)
Structure
Stress Analysis of CHESS CubeSat Under Launch Loads Using Finite Element Modeling - Already taken
Semester project
Section : ME
Description:
The goal of this semester project is to develop a finite element model of the CHESS Pathfinder 1 CubeSat using Ansys. The objective is to evaluate the stresses experienced by the satellite under various loads during its launch. These loads include quasi-static accelerations, random vibrations, and shock loads. Additionally, the project aims to determine the first eigenfrequency of the CubeSat and verify its compliance with standard requirements. The analysis will consider the worst-case launch conditions, and based on the results, recommendations for potential design improvements to the CubeSat will be provided.
Tasks:
- Gain a thorough understanding of the CHESS satellite's design and architecture.
- Model the design of the satellite in Ansys
- Perform a finite element analysis
- Make recommendations to improve the next iteration of the design Improve the existing design according to the simulations
- Compile and adapt CubeSat standards and requirements related to modelling
Background and skills:
- Courses on Finite Element Method
- Experience in Abaqus/Ansys or similar CAD softwares
The goal of this semester project is to develop a finite element model of the CHESS Pathfinder 1 CubeSat using Ansys. The objective is to evaluate the stresses experienced by the satellite under various loads during its launch. These loads include quasi-static accelerations, random vibrations, and shock loads. Additionally, the project aims to determine the first eigenfrequency of the CubeSat and verify its compliance with standard requirements. The analysis will consider the worst-case launch conditions, and based on the results, recommendations for potential design improvements to the CubeSat will be provided.
Tasks:
- Gain a thorough understanding of the CHESS satellite's design and architecture.
- Model the design of the satellite in Ansys
- Perform a finite element analysis
- Make recommendations to improve the next iteration of the design Improve the existing design according to the simulations
- Compile and adapt CubeSat standards and requirements related to modelling
Background and skills:
- Courses on Finite Element Method
- Experience in Abaqus/Ansys or similar CAD softwares
Enhancing the Hold-Down and Release Mechanism (HDRM) for Satellite Solar Panels
Semester project
Section : ME - MT
Description:
The objective of this semester project is to analyze and improve the current architecture of the satellite's Hold-Down and Release Mechanism (HDRM). This critical mechanism ensures the solar panels remain securely stowed during launch and the satellite's detumbling phase and enables their deployment in orbit. The HDRM consists of two main components: a hinge mechanism at the top and a burning wire system. Preliminary analysis suggests the placement of the burning wire mechanism may not be optimal. The project aims to use simulations and insights from existing market designs to verify the current configuration and, if necessary, propose improvements.
Tasks:
- Conduct a state-of-the-art review of HDRM designs tailored to the satellite's flower configuration for solar panels.
- Develop a detailed simulation model of the solar panels, accurately representing their layered structure and mechanical properties.
- Perform vibration simulations on the current HDRM design and potential iterations, assessing their performance when coupled with the solar panels. Simplified models will be used to maintain feasibility.
- Conduct research on stiffener implementation
- If time allows, initiate the design iteration process for the HDRM, incorporating findings from the simulations.
Background and skills:
- Proficiency in understanding mechanisms and mechanical systems.
- Prior coursework in finite element methods.
- Hands-on experience with simulation tools such as Abaqus, Ansys, or similar software
The objective of this semester project is to analyze and improve the current architecture of the satellite's Hold-Down and Release Mechanism (HDRM). This critical mechanism ensures the solar panels remain securely stowed during launch and the satellite's detumbling phase and enables their deployment in orbit. The HDRM consists of two main components: a hinge mechanism at the top and a burning wire system. Preliminary analysis suggests the placement of the burning wire mechanism may not be optimal. The project aims to use simulations and insights from existing market designs to verify the current configuration and, if necessary, propose improvements.
Tasks:
- Conduct a state-of-the-art review of HDRM designs tailored to the satellite's flower configuration for solar panels.
- Develop a detailed simulation model of the solar panels, accurately representing their layered structure and mechanical properties.
- Perform vibration simulations on the current HDRM design and potential iterations, assessing their performance when coupled with the solar panels. Simplified models will be used to maintain feasibility.
- Conduct research on stiffener implementation
- If time allows, initiate the design iteration process for the HDRM, incorporating findings from the simulations.
Background and skills:
- Proficiency in understanding mechanisms and mechanical systems.
- Prior coursework in finite element methods.
- Hands-on experience with simulation tools such as Abaqus, Ansys, or similar software
EPS (Electrical Power System)
Improving Power Management in Embedded Systems
Semester project
Section : MT - RO - EL
Description:
This semester project aims to advance the embedded system tasks essential for satellite power management. It focuses on developing and optimizing telemetry reading, Maximum Power Point Tracking (MPPT) control, and power distribution functionalities. Building upon prior work, the project integrates new features to improve the reliability and efficiency of the satellite's Electrical Power System.
Tasks:
Using previous projects:
- Define requirements for the Microcontroller Unit (MCU) tasks.
- Review and test the available code from the previous project
- Write the control for the MPPT considering previous work
MCU tasks:
- Implement a code for reading telemetry of new sensors in the board.
- Implement and optimize the logic for controlling the power distribution (turning on/off the power buses).
- Implement communication with On Board Computer (OBC).
- Implement robust error-handling mechanisms to manage sensor failures, communication errors, or power distribution faults.
- Reconfigure the ADC to operate in a time-triggered mode to reduce interrupts and power consumption.
- If time allows, test the implemented code on the board.
Background and skills:
- Firmware coding
- Familiarity with RTOS concepts, such as task scheduling, multi-threading, and resource management
This semester project aims to advance the embedded system tasks essential for satellite power management. It focuses on developing and optimizing telemetry reading, Maximum Power Point Tracking (MPPT) control, and power distribution functionalities. Building upon prior work, the project integrates new features to improve the reliability and efficiency of the satellite's Electrical Power System.
Tasks:
Using previous projects:
- Define requirements for the Microcontroller Unit (MCU) tasks.
- Review and test the available code from the previous project
- Write the control for the MPPT considering previous work
MCU tasks:
- Implement a code for reading telemetry of new sensors in the board.
- Implement and optimize the logic for controlling the power distribution (turning on/off the power buses).
- Implement communication with On Board Computer (OBC).
- Implement robust error-handling mechanisms to manage sensor failures, communication errors, or power distribution faults.
- Reconfigure the ADC to operate in a time-triggered mode to reduce interrupts and power consumption.
- If time allows, test the implemented code on the board.
Background and skills:
- Firmware coding
- Familiarity with RTOS concepts, such as task scheduling, multi-threading, and resource management
Telecommunication
Redesign and Optimization of an X-Band Patch Array Antenna
Semester project
Section : EL
Description:
The project focuses on redesigning an X-Band single-layer patch array antenna to improve its performance within the target specifications for the CHESS mission. The current antenna design achieves a realized broadside RHCP gain of approximately 17.6 dBi but presents axial ratio (AR) and frequency shift issues when integrated into the satellite structure.The student will investigate potential improvements, including modifications to the array design, feeding networks, and element orientations. The redesign aims to enhance bandwidth, optimize the AR, and mitigate the influence of the satellite structure on antenna performance.
Tasks:
- Review and analyze the existing antenna design, including simulations and characterization results.
- Perform electromagnetic simulations using ANSYS HFSS to identify sources of performance degradation.
- Explore design modifications, such as element rotation, feeding network adjustments, or multi-layer configurations, to broaden bandwidth and improve AR.
- Optimize antenna dimensions, feeding networks, and spacings through simulations.
- Validate the new design through simulations and propose potential prototyping steps.
Background and skills:
- Knowledge on antenna theory.
- Knowledge on RF and microwave engineering concepts.
- Familiarity with simulation tools (HFSS, CST Studio).
- Basic understanding of impedance matching, polarization and feeding networks.
The project focuses on redesigning an X-Band single-layer patch array antenna to improve its performance within the target specifications for the CHESS mission. The current antenna design achieves a realized broadside RHCP gain of approximately 17.6 dBi but presents axial ratio (AR) and frequency shift issues when integrated into the satellite structure.The student will investigate potential improvements, including modifications to the array design, feeding networks, and element orientations. The redesign aims to enhance bandwidth, optimize the AR, and mitigate the influence of the satellite structure on antenna performance.
Tasks:
- Review and analyze the existing antenna design, including simulations and characterization results.
- Perform electromagnetic simulations using ANSYS HFSS to identify sources of performance degradation.
- Explore design modifications, such as element rotation, feeding network adjustments, or multi-layer configurations, to broaden bandwidth and improve AR.
- Optimize antenna dimensions, feeding networks, and spacings through simulations.
- Validate the new design through simulations and propose potential prototyping steps.
Background and skills:
- Knowledge on antenna theory.
- Knowledge on RF and microwave engineering concepts.
- Familiarity with simulation tools (HFSS, CST Studio).
- Basic understanding of impedance matching, polarization and feeding networks.
Development of a RF circuit for an X-Band Transmitter
Semester project
Section : EL
Description:
This project focuses on the second iteration of the RF circuit design for an X-band transmitter. The work involves analyzing the first prototype’s performance, improving the design, and validating the changes. The X-band transmitter is intended for space communications, and the project will ensure it meets the performance requirements for integration into the CHESS mission.
Tasks:
- Analyze and characterize the results of the first prototype.
- Identify design weaknesses and propose optimizations for the RF PCB layout.
- Evaluate alternative RF components (mixers, amplifiers, filters) to enhance system performance.
- Redesign the RF circuit PCB, including simulations and layout improvements.
- Document the changes and prepare the PCB for fabrication.
Background and skills:
- Basic knowledge of RF circuit design and layout (experience with KiCad or similar software).
- Good understanding of Radio Frequency communications
- Familiarity with RF components such as mixers, filters, and amplifiers.
This project focuses on the second iteration of the RF circuit design for an X-band transmitter. The work involves analyzing the first prototype’s performance, improving the design, and validating the changes. The X-band transmitter is intended for space communications, and the project will ensure it meets the performance requirements for integration into the CHESS mission.
Tasks:
- Analyze and characterize the results of the first prototype.
- Identify design weaknesses and propose optimizations for the RF PCB layout.
- Evaluate alternative RF components (mixers, amplifiers, filters) to enhance system performance.
- Redesign the RF circuit PCB, including simulations and layout improvements.
- Document the changes and prepare the PCB for fabrication.
Background and skills:
- Basic knowledge of RF circuit design and layout (experience with KiCad or similar software).
- Good understanding of Radio Frequency communications
- Familiarity with RF components such as mixers, filters, and amplifiers.
Implementation of QPSK Modulation and Signal Processing in FPGA
Semester project
Section : EL - SC
Description:
This project focuses on programming an FPGA to handle QPSK modulation and signal processing for an X-band transmitter. The task includes designing a pipeline to process digital I/Q data efficiently, ensuring the signal is ready for analog conversion and RF transmission. The work is part of a larger effort to develop a robust communication module for the CHESS mission.
Tasks:
- Design and implement QPSK modulation in the FPGA.
- Develop the data processing pipeline to handle incoming signals for transmission.
- Integrate a DAC interface to convert the digital I/Q data into analog signals.
- Optimize the FPGA implementation for timing, data rate, and resource utilization.
- Validate the FPGA functionality through simulations and hardware tests.
- Document the FPGA programming and testing process.
Background and skills:
- Knowledge of digital signal processing techniques.
- Experience with FPGA programming.
- Debugging and testing skills.
This project focuses on programming an FPGA to handle QPSK modulation and signal processing for an X-band transmitter. The task includes designing a pipeline to process digital I/Q data efficiently, ensuring the signal is ready for analog conversion and RF transmission. The work is part of a larger effort to develop a robust communication module for the CHESS mission.
Tasks:
- Design and implement QPSK modulation in the FPGA.
- Develop the data processing pipeline to handle incoming signals for transmission.
- Integrate a DAC interface to convert the digital I/Q data into analog signals.
- Optimize the FPGA implementation for timing, data rate, and resource utilization.
- Validate the FPGA functionality through simulations and hardware tests.
- Document the FPGA programming and testing process.
Background and skills:
- Knowledge of digital signal processing techniques.
- Experience with FPGA programming.
- Debugging and testing skills.
Ground segment
Development and Testing of a UHF Communication System
Semester project
Section : MT - EL - SC
Description:
This project focuses on developing a half-duplex Ultra-High-Frequency (UHF) communication system for the CHESS mission. It builds on the foundation of a previous semester project, which concentrated on reception scripts and integrating off-the-shelf UHF transceivers and antenna components. The primary objectives are to first enable successful transmission with the transceiver, followed by reception capabilities. Ultimately, the project aims to validate the communication system through closed-loop half-duplex testing using GNU Radio scripts.
Tasks:
- Configure the transceiver to meet the mission's requirements.
- Test signal transmission using a Software-Defined Radio (SDR).
- Develop GNU Radio scripts for signal transmission, leveraging existing reception scripts and the defined communication strategy.
- Implement all required modulation and encoding protocols.
- Perform full closed-loop testing of half-duplex communication between the SDR and the transceiver.
Background and skills:
- Knowledge of digital signal processing techniques
- Interest in radio amateur and/or satellite applications.
- Proficiency in Python
- Experience in debugging and testing
- Familiarity with GNU Radio (preferred but not mandatory)
This project focuses on developing a half-duplex Ultra-High-Frequency (UHF) communication system for the CHESS mission. It builds on the foundation of a previous semester project, which concentrated on reception scripts and integrating off-the-shelf UHF transceivers and antenna components. The primary objectives are to first enable successful transmission with the transceiver, followed by reception capabilities. Ultimately, the project aims to validate the communication system through closed-loop half-duplex testing using GNU Radio scripts.
Tasks:
- Configure the transceiver to meet the mission's requirements.
- Test signal transmission using a Software-Defined Radio (SDR).
- Develop GNU Radio scripts for signal transmission, leveraging existing reception scripts and the defined communication strategy.
- Implement all required modulation and encoding protocols.
- Perform full closed-loop testing of half-duplex communication between the SDR and the transceiver.
Background and skills:
- Knowledge of digital signal processing techniques
- Interest in radio amateur and/or satellite applications.
- Proficiency in Python
- Experience in debugging and testing
- Familiarity with GNU Radio (preferred but not mandatory)
OBC
Design of On-Board Computer for CHESS Mission
Semester project
Section : MT - EL
Description:
The On-Board Computer (OBC) of the CHESS satellite plays a critical role in facilitating communication between all subsystems. The current OBC, the TwoCan (now in its second iteration), has some limitations regarding the communication protocols it supports. For the third iteration of the TwoCan OBC, there is a need to either replace the existing microcontroller (MCU) with one that supports all the required communication protocols or to integrate a "modchip" or a Modbus that can convert communication standards (e.g., RS-485 to a bus protocol), freeing up resources on the current MCU. The goal of this project is to evaluate these two options, determine which is more suitable for the system’s needs, and then incorporate the chosen solution into the OBC design.
Tasks:
- Review requirements, assess the communication protocol requirements for the CHESS satellite subsystems.
- Analyze the trade-offs between retaining or switching the current MCU.
- Document the decision-making process, including trade-offs and justification for the final choice.
- Depending on the chosen solution, modify the existing OBC design or initiate a new design for the OBC.
Background and skills:
- Knowledge in embedded systems.
- Some knowledge in PCB design is a plus.
Flight Software
Design of the Flight Software Architecture for the CHESS Pathfinder 1 Mission
- Already taken
Semester project
Section : INF - SC
Description:
This project focuses on designing the architecture of the Flight Software for the CHESS Pathfinder 1 mission. The objective is to design a modular and maintainable software system using the F Prime framework, tailored to the mission’s specific requirements. The project will involve analyzing and understanding the operational requirements of the mission, splitting them into a number of independent components, outlining the global software topology and interfaces between these components, conducting a risk analysis and documenting the process to ensure clarity and reproducibility. If time permits, the student will also initiate the design of a Hierarchical Finite State Machine to manage mission operations.
Tasks:
- Understand basic notions of programming in a component-driven language (F prime).
- Design the topology of the flight software, which includes splitting the software into components, specifying their requirements, and detailing their interfaces.
- Document the process thoroughly and justify the design choices.
- If time allows, start the design of the main Hierarchical Finite State Machine, which is responsible for handling mission state transitions and coordinating subsystem interactions.
Background and skills:
- Software architecture
- Concurrency