Development of a radio on CPU for space communications
Semester project
Section : IN - SC
Description:
The scientific data from the CHESS mission shall be transmitted from space to the ground via our in-house communication system at high frequency (X-band). Two options are being considered for the on-board data processing pipeline: A FPGA-backed option allowing for high data rates or a software solution in C to be run on the subsystem’s CPU. The student shall develop the latter software and test it on the team’s hardware to assess its efficiency and contribute to the final trade-off.
Tasks:
- Pursue the previously delivered work on the X-band subsystem software by shaping the processing pipeline on Simulink or GNURadio
- Produce a code in C that executes the pipeline on CPU
- Test the code on the team’s development boards to characterize its performances (maximal data rate, bit error rate at reception)
- If time allows, produce also the decoding pipeline to be run on ground
Background and skills:
- Coding skills in C
- Basic understanding of Radio Frequency communications
- Experience with hardware is a plusExperience with Simulink/GNURadio is a plus
Development of a radio transmitter for space communications - Already taken
Semester project
Section : EL
Description:
The scientific data from the CHESS mission shall be transmitted from space to the ground via our in-house communication system at high frequency (X-band). Two options are being considered for the on-board data processing pipeline, namely : one FPGA-backed option allowing for huge data rates, and a software in C to be runned on the subsystem’s CPU. The student shall contribute to the final design, manufacture and test the PCB hosting the satellite’s transmitter.
Tasks:
- Pursue the previously delivered work on the X-band subsystem hardware by reviewing the two proposed design for the transmitter
- Manufacture the preferred design (or if time allows, both of them)
- Characterize the PCB with extensive testingIf concurrent efforts on software allow, test the radio software directly on the manufactured PCB
Background and skills:
- Skills in electrical engineering
- Good understanding of Radio Frequency communications
- Experience in PCB manufacturing
Digital Twin CubeSat - Already taken
Semester project
Section : ALL
Description:
The objective of this project is to develop a digital twin (model) of the CHESS CubeSat. The project shall include the orbit analysis (orbit propagator) as well as the modeling of the satellites subsystems. The prioritized subsystems to be implemented are the attitude determination and control system (ADCS), electrical power system (EPS) and the communication system. The modules shall interact with each other in order that effects from different satellite operations and conditions can directly be seen on all the subsystems at the same time. If time allows a graphic user interface (GUI) shall be implemented.
Tasks:
- Implementation of Orbit Propagator
- Digital Twin model of the satellite with ADCS, EPS, Telecom modules that interact with the orbit propagator
- Graphic User Interface
- Develop a complete source code of the project
- Complete documentation of the methodology, environment and configuration
Background and skills:
- Good understanding of orbital mechanics
- Experience in programming with Python
Design of On-Board Computer for CHESS Mission - Already taken
Semester project
Section : MT - EL -Space Minor
Description:
Next, to its main mission CHESS the EPFL Spacecraft Team does In-Orbit Demonstrations of their subsystems to test them under real conditions and reduce the risk for the final mission. The first successful IOD took place in January 2023 launched with Space X Falcon 9. During this mission a lot about the functioning of the OBC was learned.This semester project’s goal is to include the lessons learned from the IOD and redesign the OBC circuit board to fit the exact requirements of the final CHESS CubeSat mission. The end goal of the project is to develop the schematics of the final PCB that will be used for the CHESS mission considering the last modifications made and the transceivers and adaptations that have to be done to the current Twocan board.
Tasks:
- Define the modifications needed for the current iteration of the board to comply with the requirements of the CHESS mission and to interface with all the subsystems
- RS422 transceiver for communication with Attitude Determination and Control System
- RS485 transceiver for communication with UHF-Transceiver
- Add eMMC storage
- Gain a thorough understanding of the OBC architecture
- Develop and model the schematics of the OBC in KiCAD
- Document the whole process.
Background and skills:
- Courses related to IC Design
- Experience in PCB Design (Eagle, KiCAD)
Expected Output:
- The student is expected to develop the schematics of the final board that will be used for the final mission that shall be able to interface with the other subsystems.
Development of a full-scale integration testing framework for Flight Software Validation
Semester project
Section : INF - COM
Description:
Proper integration testing of the satellite's flight software (FS) is very important. Until now, a direct access to the on board computer (OBC) is needed, which slows down the development. The aim of this project is to virtualize as much of the flight software's environment as possible, which not only includes the OS, but also the processor, OBC and other components of the satellite the FS interfaces with. The project is divided in two parts:
The first part consists of setting up an accurate software emulation of the environment provided by the OBC (running a custom Linux version on ARM, with memory-mapped GPIO lines and serial I/O ports) to run the native FS in, most likely using QEMU, an open-source machine emulator and virtualizer.
The second part consists of working on a full-scale integration testing framework in which the emulated FS would run together with virtualized hardware components of the satellite and proper interfaces between them. It should provide the ability to observe, log and automatically validate all communication between the components, as well as orchestrate test cases by sending timed signals to the virtualized components. Python would probably be the language of choice for this framework, as it is not performance critical and most of the tooling external to the FS is already written in Python.
Tasks:
- QEMU Setup and Configuration
- Development of a full-scale integration testing framework.
Background and skills:
- Operating systems and embedded software development
- Strong understanding of C++ (language of the flight software)
- Good Python programming skills (for the testing framework).